To improve system reliability, a synthetic control equipment with dual CPU hot-redundancy technology is proposed, in which the real time state monitor and switching on master and slave are realized by arbitration. In consideration the complexity, reliability and implementation difficulty, a redundancy management method for task-level synchronization is proposed, which realizes the synchronization of task between the master and slave through the communication link and the task synchronization software running on the CPU module. This method not only meets the device synchronization requirement, but also easy to implement with low complexity.

The bus architecture of compact peripheral component interconnect (CPCI) has been gaining immense popularity in the area if aerospace test since its establishment by PCI industrial computer manufacturer's group (PICMG). High availability (HA) system allows measurement and control system to reduce the mean-time-to-repair (MTTR) effectively and improve the mean time between critical failures (MTBCF). CPCI bus structure is taken as an example to demonstrate a perfectly developed design schemes through discussion and research. With the way to improve the power management, the underlying design can support the HA level hot swap and hot backup function, which is possible for the measurement and control system to meet the urgent need for enhancing reliability and maintainability of the system.